Title |
Processes |
Material |
Chamber Principle |
Chamber Hardware |
Supplier |
Topic |
|
Baratron fault | Gate etch | | ICP | TCP® | LAM | FDC | ![](/images/lupe.gif) |
Open area influences the process | Gate etch | Polysilicon / a-Si | ICP | TCP® | LAM | Process Stability | ![](/images/lupe.gif) |
Remaining oxide after gate etch correlates with collision rate | Gate etch | Oxide | ICP | TCP® | LAM | Process Performance | ![](/images/lupe.gif) |
First wafer effect and prediction of etch profile variations | Gate etch | Oxide | ICP | TCP® | LAM | Clean / Conditioning | ![](/images/lupe.gif) |
Implementation of a robust virtual metrology for plasma etching | Gate etch | Oxide | ICP | DPS | AMAT | Virtual Metrology | ![](/images/lupe.gif) |